3位元全加法器(行為/結構)

 module test_adder1;

 reg [2:0]a,b;
 reg [2:0]carry_in ;
 wire [2:0]sum;
 wire [2:0]carry_out;

 adder1_behavorial A1(carry_out[0], sum[0], a[0], b[0], carry_in[0]);
 adder1_behavorial A2(carry_out[1], sum[1], a[1], b[1], carry_in[1]);
 adder1_behavorial A3(carry_out[2], sum[2], a[2], b[2], carry_in[2]);

 initial
  begin

    carry_in = 0; a = 0; b = 0;
    # 100 if ( carry_out != 0 | sum !== 0)
                $display(" 0+0+0=00 sum is WRONG!");
              else
                $display(" 0+0+0=00 sum is RIGHT!");
    carry_in = 0; a = 0; b = 1;
    # 100 if ( carry_out != 0 | sum !== 1)
               $display(" 0+0+1=01 sum is WRONG!");
              else
               $display(" 0+0+1=01 sum is RIGHT!");
    carry_in = 0; a = 1; b = 0;
    # 100 if ( carry_out != 0 | sum !== 1)
                $display(" 0+1+0=01 sum is WRONG!");
              else
                $display(" 0+1+0=01 sum is RIGHT!");
    carry_in = 0; a = 1; b = 1;
    # 100 if ( carry_out != 1 | sum !== 0)
                $display(" 0+1+1=10 sum is WRONG!");
              else
                $display(" 0+1+1=10 sum is RIGHT!");
    carry_in = 1; a = 0; b = 0;
    # 100 if ( carry_out != 1 | sum !== 0)
                $display(" 1+0+0=01 sum is WRONG!");
              else
                $display(" 1+0+0=01 sum is RIGHT!");
    carry_in = 1; a = 0; b = 1;
    # 100 if ( carry_out != 1 | sum !== 0)
                $display(" 1+0+1=10 sum is WRONG!");
              else
                $display(" 1+0+1=10 sum is RIGHT!");
    carry_in = 1; a = 1; b = 0;
    # 100 if ( carry_out != 1 | sum !== 0)
                $display(" 1+1+0=10 sum is WRONG!");
              else
                $display(" 1+1+0=10 sum is RIGHT!");
    carry_in = 1; a = 1; b = 1;
    # 100 if ( carry_out != 1 | sum !== 1)
               $display(" 1+1+1=11 sum is WRONG!");
              else
               $display(" 1+1+1=11 sum is RIGHT!");
    $finish;
  end
endmodule



module adder1_behavorial (carry_out, sum, a, b, carry_in);
 input a, b, carry_in;
 output carry_out, sum;
  assign sum = (~a&b&~carry_in)|(~carry_in&a&~b)|(a&b&carry_in)|(~a&~b&carry_in);
  assign carry_out = a&carry_in|a&b|b&carry_in;
endmodule

module fulladder (sum, c_out, a, b, c_in);

wire s1, c1, c2;

output sum;

output c_out;

input a, b, c_in;

assign{c_out,sum}=a+b+c_in;

endmodule

module adder3(sum, c_out, a, b, c_in);

wire [2:0] c; 

output [2:0] sum;

output c_out;

input [2:0] a;

input [2:0] b;

input c_in;

fulladder fa1(sum[0], c[1], a[0], b[0], c_in) ;

fulladder fa2(sum[1], c[2], a[1], b[1], c[1]) ;

fulladder fa3(sum[2], c_out, a[2], b[2], c[2]) ;

endmodule

module main;

reg [2:0] a;

reg [2:0] b;

wire [2:0] sum;

wire c_out;

adder3 DUT (sum, c_out, a, b, 1'b0);

initial

begin

  a = 4'b0101;

  b = 4'b0000;

end

always #50 begin

  b=b+1;

  $monitor("%dns monitor: a=%d b=%d sum=%d", $stime, a, b, sum);

end

initial #2000 $finish;

endmodule

11/18 一位元全加法器&行為模式

 module test_adder1;

 reg a,b;
 reg carry_in ;
 wire sum;
 wire carry_out;

 adder1_behavorial A1(carry_out, sum, a, b, carry_in);

 initial
  begin

    carry_in = 0; a = 0; b = 0;
    # 100 if ( carry_out != 0 | sum !== 0)
                $display(" 0+0+0=00 sum is WRONG!");
              else
                $display(" 0+0+0=00 sum is RIGHT!");
    carry_in = 0; a = 0; b = 1;
    # 100 if ( carry_out != 0 | sum !== 1)
               $display(" 0+0+1=01 sum is WRONG!");
              else
               $display(" 0+0+1=01 sum is RIGHT!");
    carry_in = 0; a = 1; b = 0;
    # 100 if ( carry_out != 0 | sum !== 0)
                $display(" 0+1+0=01 sum is WRONG!");
              else
                $display(" 0+1+0=01 sum is RIGHT!");
    carry_in = 0; a = 1; b = 1;
    # 100 if ( carry_out != 0 | sum !== 0)
                $display(" 0+1+1=10 sum is WRONG!");
              else
                $display(" 0+1+1=10 sum is RIGHT!");
    carry_in = 1; a = 0; b = 0;
    # 100 if ( carry_out != 0 | sum !== 0)
                $display(" 1+0+0=01 sum is WRONG!");
              else
                $display(" 1+0+0=01 sum is RIGHT!");
    carry_in = 1; a = 0; b = 1;
    # 100 if ( carry_out != 0 | sum !== 0)
                $display(" 1+0+1=10 sum is WRONG!");
              else
                $display(" 1+0+1=10 sum is RIGHT!");
    carry_in = 1; a = 1; b = 0;
    # 100 if ( carry_out != 0 | sum !== 0)
                $display(" 1+1+0=10 sum is WRONG!");
              else
                $display(" 1+1+0=10 sum is RIGHT!");
    carry_in = 1; a = 1; b = 1;
    # 100 if ( carry_out != 1 | sum !== 1)
               $display(" 1+1+1=11 sum is WRONG!");
              else
               $display(" 1+1+1=11 sum is RIGHT!");
    $finish;
  end
endmodule



module adder1_behavorial (carry_out, sum, a, b, carry_in);
 input a, b, carry_in;
 output carry_out, sum;
  assign sum = (~a&b&~carry_in)|(~carry_in&a&~b)|(a&b&carry_in)|(~a&~b&carry_in);
  assign carry_out = a&carry_in|a&b|b&carry_in;
endmodule

module fulladder (sum , c_out, a , b , c_in);

output sum,c_out;
input a, b, c_in;

wire s1,c1,c2 ;
and(cl, a,b) ;
xor(s1, a,b);
xor  (sum, s1, c_in) ;
and  (c2, s1, c_in) ;
or  (c_out, c2, c1) ;
endmodule

一.二位元多工器(行為模式)

module top;
  integer ia,ib,is;
  reg  a,b,s;
  wire out;

  mux_behavioral mux1(out,a,b,s);

  initial
    begin
      for (is=0; is<=1; is = is+1)
        begin
          s = is;
          for (ia=0; ia<=1; ia = ia + 1)
            begin
              a = ia;
              for (ib=0; ib<=1; ib = ib + 1)
               begin
                 b = ib;
                 #100 $display("a=%d b=%d s=%d   out=%d",a,b,s,out);
               end
            end
        end
    end
endmodule

module mux_behavioral(OUT, A, B, SEL);
 output OUT;
 input A,B,SEL;
 wire  A,B,SEL;
 reg    OUT;

  always @(A or B or SEL)
   OUT = (A & SEL)|(B & ~SEL );
endmodule

module top;  

integer is;

  integer ia[1:0],ib[1:0];

  reg [1:0]a,b;

  reg s;

  wire [1:0]out;

  mux_behavioral mux2(out,a,b,s);

  initial

    begin

      for (is=0; is<=1; is = is + 1)

       begin

        s = is;

         for (ia[0]=0; ia[0]<=1; ia[0] = ia[0]+1)

          begin

           a[0]= ia[0];

            for (ia[1]=0; ia[1]<=1; ia[1] = ia[1]+ 1)

             begin

              a[1] = ia[1];

               for (ib[0]=0; ib[0]<=1; ib[0] = ib[0]+1)

                 begin

                   b[0] = ib[0];

                    for (ib[1]=0; ib[1]<=1; ib[1] = ib[1]+ 1)

                     begin

                      b[1] = ib[1];

                 #1 $display("a[0]=%d a[1]=%d b[0]=%d b[1]=%d s=%d out[0]%d out[1]%d",a[0],a[1],b[0],b[1],s,out[0],out[1]);

                      end

                    end

                  end

              end

         end

    end

endmodule

module mux_behavioral(OUT,A,B,SEL);

 output [1:0]OUT;

 input [1:0] A,B;

 input SEL;

mux1 X1(OUT[0],A[0],B[0],SEL);

mux1 X2(OUT[1],A[1],B[1],SEL);

endmodule

module mux1(OUT, A, B, SEL);

 output OUT;

 input A,B,SEL;

 not n1(NOT_SEL, SEL);

 and a1 (X, A, NOT_SEL);

 and a2 (Y, SEL, B);

 or  o1 (OUT, X, Y);

endmodule